Technical Fellow
Microchip Technology Inc.

Biography

Ted Speers is a Technical Fellow at Microchip’s FPGA BU, where he is responsible for defining its roadmap for low power, secure, reliable FPGAs and SoC FPGAs. Ted is a RISC-V leader and evangelist and has served on the Board of Directors of RISC-V International since its inception in 2016 through 2024. He joined Actel (now part of Microchip) in 1987 and held roles in process engineering and product engineering before assuming his current role in 2003. He is co-inventor on 35 U.S. patents. In his role, Ted has consistently defined the first of its kind products including the RT-SX rad-tolerant by design FPGA and the most recent example being PolarFireSoC, the first RISC-V based SoC FPGA. Prior to joining Actel, he worked at LSI Logic. Ted has a Bachelor of Science in chemical engineering from Cornell.

We have lift-off!
The past, present and future of RISC-V in space.

Microchip Technology’s journey with RISC-V began in space, where the need for an open, adaptable architecture drove early adoption. RISC-V’s open ISA allowed companies and researchers to innovate, tailoring solutions to the unique demands of space, including fault tolerance and radiation resistance. This talk traces our path from those beginnings to the development of NASA’s High-Performance Spaceflight Computer (HPSC), a groundbreaking system set to power future lunar and deep-space missions. Along the way, we’ve launched RISC-V to the International Space Station—and now, to the Moon. Join us as we explore the past, present, and future of RISC-V in space and how it’s shaping the next era of spaceflight computing.